Semiconductor devices in an integrated circuit (IC) structure will have middle of the line (MOL) contacts. For example, a field effect transistor (FET) can have source/drain contacts (also referred to as CA contacts) and a gate contact (also referred to as a CB contact). The source/drain contacts can extend vertically through interlayer dielectric material from metal wires or vias in a first back end of the line (BEOL) metal level (referred to herein as M0) to contact plugs (also referred to as TS contacts) on the source/drain regions of the FET and the gate contact can extend vertically from a metal wire or via in the first BEOL metal level (M0) through the interlayer dielectric material to the gate electrode of the FET. Historically, these MOL contacts are formed by etching the contact openings in the interlayer dielectric material, lining the contact openings with a liner that incorporates one or more barrier layers (e.g., of titanium and/or titanium nitride), filling the contact openings with a metal (e.g., tungsten) and performing a chemical-mechanical polishing (CMP) process to remove all material from above the top surface of the interlayer dielectric material. The first BEOL metal level (M0) is then formed above the interlayer dielectric material with metal wires or vias immediately adjacent to the top surface of the MOL contacts. There is, however, a need in the art for a method of forming an IC structure, wherein the MOL contacts are less subject to damage during BEOL processing.